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 INTEGRATED CIRCUITS
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TEA1202TS Battery power unit
Objective specification File under Integrated Circuits, IC03 2000 Jun 08
Philips Semiconductors
Objective specification
Battery power unit
FEATURES * Fully integrated battery power unit, including complete DC/DC converter circuit, two Low DropOut voltage regulators (LDOs) and a battery low detector * Configurable for 1, 2 or 3-cell Nickel-Cadmium (NiCd) or Nickel Metal Hybrid (NiMH) batteries and 1 Lithium Ion (Li-Ion) battery * Guaranteed DC/DC converter start-up from 1-cell NiCd or NiMH battery, even with an load current * Upconversion or downconversion * Internal power MOSFETs featuring a low RDSon of approximately 0.1 * Synchronous rectification for high efficiency * Soft start * PWM-only operating option * Dropout voltage of 75 mV at 50 mA * Both LDOs are also applicable as low-ohmic power switches * Stable LDO performance with ceramic capacitors * Stand-alone low battery detector requires no additional supply voltage * Low battery detection level at 0.90 V, externally adjustable to a higher level * Adjustable output voltages * Shut-down function * Small outline package * Advanced 0.6 m BICMOS process. APPLICATIONS * Cellular phones * Cordless phones * Personal Digital Assistants (PDAs) * Portable Audio Players * Pagers * Mobile equipment. ORDERING INFORMATION TYPE NUMBER TEA1202TS PACKAGE NAME SSOP20 DESCRIPTION GENERAL DESCRIPTION
TEA1202TS
The TEA1202TS is a fully integrated battery power unit including a high-efficiency DC/DC converter which runs from a 1-cell NiCd or NiMH battery, two low dropout voltage regulators and a low battery detector. The circuit can be arranged in many ways to optimize the application circuit of a power supply system. Therefore, most inputs and outputs are separated, the DC/DC converter can be arranged for upconversion or downconversion and the regulators can also be used as power switches. One regulator can be used completely independent of the rest of the system, and the low battery detector can be configured for several types of batteries. Accurate low battery detection is possible while all other blocks are switched off. The DC/DC converter features efficient, compact and dynamic power conversion using a digital control concept comparable with Pulse Width Modulation (PWM) and Pulse Frequency Modulation (PFM), integrated CMOS power switches with a very low RDSon and fully synchronous rectification. The device operates at a switching frequency of 600 kHz which enables the use of external components with minimum size. The switching frequency can be synchronized to an external high frequency clock signal. Optionally, the device can be kept in PWM control mode only. Deadlock is prevented by an on-chip undervoltage lockout circuit. Active current limiting enables efficient conversion in pulsed-load systems such as Global System for Mobile communication (GSM) and Digital Enhanced Cordless Telecommunications (DECT). Both LDOs show a low dropout voltage and are inherently stable, even when ceramic capacitors with a low ESR value are applied at the outputs. Usage of the LDOs as low-ohmic switches is also possible. The low battery detector has a built-in detection level which is optimum for a 1-cell NiCd or NiMH battery. Higher battery voltages can be translated to this 1-cell level by an additional built-in LDO circuit.
VERSION SOT266-1
plastic shrink small outline package; 20 leads; body width 4.4 mm
2000 Jun 08
2
Philips Semiconductors
Objective specification
Battery power unit
QUICK REFERENCE DATA SYMBOL DC/DC converter UPCONVERSION VI(up) VO(up) VI(start) VI(dwn) VO(dwn) Iq Ishdwn ILX(max) Ilim input voltage output voltage start-up input voltage IL < 10 mA VI(start) VO(uvlo) 0.93 - - 0.96 - - 110 2 - PARAMETER CONDITIONS MIN. TYP.
TEA1202TS
MAX.
UNIT
5.50 5.50 1.00
V V V
DOWNCONVERSION input voltage output voltage VO(uvlo) 1.30 - 0 Tamb = 80 C Ilim set to 1.0 A upconversion downconversion POWER MOSFETS RDSon(N) RDSon(P) EFFICIENCY efficiency upconversion VI = 1.2 V; VO up to 3.3 V IL = 1 mA IL = 10 mA IL = 100 mA TIMING fsw fi(sync) tstart VLDO Vdropout ILDO(max) RDSon switching frequency synchronization clock input frequency start-up time PWM mode 480 6 - VLDO < V4 + 0.4 V ILDO = 50 mA in regulation VFB1,2 > 2 V; Tj = 27 C 1.30 - - - 600 13 10 - - 50 200 720 20 - 5.50 75 - - kHz MHz ms - - - 66 81 85 - - - % % % drain-to-source on-state resistance NFET drain-to-source on-state resistance PFET Tj = 27 C Tj = 27 C - - 110 125 - - m m -12 -12 - - +12 +12 % % - 5.50 5.50 - 10 1.0 V V A A A
CURRENT LEVELS quiescent current current in shut-down mode maximum continuous current at pins LX1 and LX2 current limit deviation
Low dropout voltage regulators output voltage range dropout voltage maximum output current drain-to-source on-state resistance V mV mA m
General characteristics Vref 2000 Jun 08 reference voltage 3 1.165 1.190 1.215 V
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LBI2 12 Vref 10 LBI1 13 OUT2 FB2
BLOCK DIAGRAM
Philips Semiconductors
Battery power unit
3 11
SHDWN2 IN2
TEA1202TS
SHDWN0 LOW BATTERY DETECTOR Vref
LDO2
9
6 LBO LX1 LX2 14 1 20 sense FET P-type POWER FET LDO1 7 4
OUT1 FB1 UPOUT/DNIN
INTERNAL SUPPLY 8 START-UP CIRCUIT GND
17 GND0
18
handbook, full pagewidth
4
ILIM 5 Vref CURRENT LIMIT COMPARATOR CONTROL LOGIC AND MODE GEARBOX Vref N-type POWER FET TEMPERATURE PROTECTION sense FET 13 MHz OSCILLATOR SYNC GATE 2 TIME COUNTER DIGITAL CONTROLLER 19 SYNC/PWM SHDWN0 U/D
16
FB0
REFERENCE 15 VOLTAGE
Vref
Objective specification
TEA1202TS
MGU062
Fig.1 Block diagram.
Philips Semiconductors
Objective specification
Battery power unit
PINNING SYMBOL LX1 SHDWN0 SHDWN2 UPOUT/DNIN ILIM OUT1 FB1 GND FB2 OUT2 IN2 LBI2 LBI1 LBO Vref FB0 GND0 SYNC/PWM U/D LX2 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DESCRIPTION inductor connection 1 DC/DC shut-down input LDO2 shut-down input up mode: DC/DC output; down mode DC/DC input current limiting resistor connection LDO1 output LDO1 feedback input internal supply ground LDO2 feedback input LDO2 output LDO2 input low battery detector input 2 low battery detector input 1 low battery detector output reference voltage DC/DC feedback input DC/DC converter ground synchronization clock input or PWM-only selection input conversion mode selection input inductor connection 2
handbook, halfpage
TEA1202TS
LX1 1 SHDWN0 2 SHDWN2 3 UPOUT/DNIN 4 ILIM 5
20 LX2 19 U/D 18 SYNC/PWM 17 GND0 16 FB0
TEA1202TS
OUT1 6 FB1 7 GND 8 FB2 9 OUT2 10
MGU060
15 Vref 14 LBO 13 LBI1 12 LBI2 11 IN2
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION Control mechanism The TEA1202TS DC/DC converter is able to operate in PFM (discontinuous conduction) or PWM (continuous conduction) operating mode. All switching actions are completely determined by a digital control circuit which uses the output voltage level as its control input. This novel digital approach enables the use of a new pulse width and frequency modulation scheme, which ensures optimum power efficiency over the complete range of operation of the converter. When high output power is requested, the device will operate in PWM (continuous conduction) operating mode. This results in minimum AC currents in the circuit components and hence optimum efficiency, minimum costs and low EMC. In this operating mode, the output voltage is allowed to vary between two predefined voltage levels. As long as the output voltage stays within this so-called window, switching continues in a fixed pattern. 2000 Jun 08 5
When the output voltage reaches one of the window borders, the digital controller immediately reacts by adjusting the pulse width and inserting a current step in such a way that the output voltage stays within the window with higher or lower current capability. This approach enables very fast reaction to load variations. Figure 3 shows the response of the converter to a sudden load increase. The upper trace shows the output voltage. The ripple on top of the DC level is a result of the current in the output capacitor, which changes in sign twice per cycle, times the internal Equivalent Series Resistance (ESR) of the capacitor. After each ramp-down of the inductor current, i.e. when the ESR effect increases the output voltage, the converter determines what to do in the next cycle. As soon as more load current is taken from the output the output voltage starts to decay.
Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
handbook, full pagewidth
load increase Vo
start corrective action high window limit low window limit
time
IL
time
MGK925
Fig.3 Response to load increase.
handbook, full pagewidth
Vh Vh VO 2% Vl Vl typical situation maximum positive spread maximum negative spread
MGU061
2% +2% Vl -2% Vh 2%
Fig.4 Output voltage window spread.
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
When the output voltage becomes lower than the low limit of the window, a corrective action is taken by a ramp-up of the inductor current during a much longer time. As a result, the DC current level is increased and normal PWM control can continue. The output voltage (including ESR effect) is again within the predefined window. Figure 4 shows the spread of the output voltage window. The absolute value is mostly dependent on spread, while the actual window size (Vh - Vl) is not affected. For one specific device, the output voltage will not vary more than 2% (typical value). In low output power situations, the TEA1202TS will switch over to PFM (discontinuous conduction) operating mode. In this mode, regulation information from an earlier PWM operating mode is used. This results in optimum inductor peak current levels in the PFM mode, which are slightly larger than the inductor ripple current in the PWM mode. As a result, the transition between PFM and PWM mode is optimum under all circumstances. In the PFM mode the TEA1202TS regulates the output voltage to the high window limit as shown in Fig.3. Synchronous rectification For optimum efficiency over the whole load range, synchronous rectifiers inside the TEA1202TS ensure that during the whole second switching phase, all inductor current will flow through the low-ohmic power MOSFETs. Special circuitry is included which detects when the inductor current reaches zero. Following this detection, the digital controller switches off the power MOSFET and proceeds with regulation. Start-up Start-up from low input voltage in the boost mode is realized by an independent start-up oscillator, which starts switching the N-type power MOSFET as soon as the low-battery detector detects a sufficiently high voltage. The inductor current is limited internally to ensure soft-starting. The switch actions of the start-up oscillator will increase the output voltage. As soon as the output voltage is high enough for normal regulation, the digital control system takes control over the power MOSFETs. Undervoltage lockout
TEA1202TS
As a result of too high a load or disconnection of the input power source, the output voltage can drop so low that normal regulation cannot be guaranteed. In this event, the device switches back to start-up mode. If the output voltage drops even further, switching is stopped completely. Shut-down When the shut-down input is set HIGH, the DC/DC converter disables both switches and power consumption is reduced to a few microamperes. Power switches The power switches in the IC are one N-type and one P-type power MOSFET, both having a typical drain-to-source resistance of 100 m. The maximum average current in the power switches is 1.0 A at Tamb = 80 C. Temperature protection When the DC/DC converter operates in the PWM mode, and the die temperature gets too high (typical value is 160 C), the converter and both LDOs stop operating. They resume operation when the die temperature falls below 90 C again. As a result, low frequent cycling between the on and off state will occur. It should be noted that in the event of device temperatures at the cut-off limit, the application differs strongly from maximum specifications. Current limiters If the current in one of the power switches exceeds the programmed limit in the PWM mode, the current ramp is stopped immediately and the next switching phase is entered. Current limiting is required to keep power conversion efficient during temporary high loads. Furthermore, current limiting protects the IC against overload conditions, inductor saturation, etc. The current limiting level is set by an external resistor which must be connected between pin ILIM and ground for downconversion, or between pins ILIM and UPOUT/DNIN for upconversion.
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
External synchronization and PWM-only mode If an external high-frequency clock or a HIGH level is applied to pin SYNC/PWM, the TEA1202TS will use PWM regulation independent of the load applied. In the event a high-frequency clock is applied, the switching frequency in the PWM mode will be exactly that frequency divided by 22. In the PWM mode the quiescent current of the device increases. In the event that no external synchronization or PWM mode selection is necessary, pin SYNC/PWM must be connected to ground. Behaviour at input voltage exceeding the specified range In general, an input voltage exceeding the specified range is not recommended since instability may occur. There are two exceptions: 1. Upconversion: at an input voltage higher than the target output voltage, but up to 5.5 V, the converter will stop switching and the external Schottky diode will take over. The output voltage will equal the input voltage minus the diode voltage drop. Since all current flows through the external diode in this situation, the current limiting function is not active. In the PWM mode, the P-type power MOSFET is always on when the input voltage exceeds the target output voltage. The internal synchronous rectifier ensures that the inductor current does not fall below zero. As a result, the achieved efficiency is higher in this situation than standard PWM-controlled converters achieve. 2. Downconversion: when the input voltage is lower than the target output voltage, but higher than 2.2 V, the P-type power MOSFET will stay conducting resulting in an output voltage being equal to the input voltage minus some resistive voltage drop. The current limiting function remains active. Low dropout voltage regulators The low dropout voltage regulators are functionally equal apart from the shut-down mechanism: LDO2 can be controlled separately by pin SHDWN2, while LDO1 is controlled by pin SHDWN0 like the DC/DC converter. The input voltage of each LDO must be 250 mV higher than its output voltage to achieve full specification on e.g. ripple rejection. However, the parts will function like an LDO down to a margin of 75 mV between input and output: the so-called dropout voltage. At a lower margin between input and output, the LDOs will behave like a resistor. 2000 Jun 08 8
TEA1202TS
Both LDOs are protected from overload conditions by a current limiting circuit and high temperature (see Section "Temperature protection"). Next to normal LDO functions, both regulators can be switched off or can be used as switches. Each regulator will act as a low-ohmic switch in the on-state when its feedback input is connected to ground. When the feedback input is higher than 2 V, the regulator will make its power FET high-ohmic. So the feedback inputs of the regulators can be used as digital inputs which make the LDOs behave as switches. Low battery detector The low battery detector is an autonomous circuit which can work at an input voltage down to 0.90 V. It is always on, even when all other blocks are in the shut-down mode. The detector has two inputs: the input on pin LBI1 is tuned to accept a 1-cell NiCd or NiMH battery voltage directly, while the input on pin LBI2 can detect a 2-cell NiCd or NiMH battery voltage or higher voltage. The detection level of the input on pin LBI2 can be set by using a voltage divider between the battery voltage, pin LBI2 and ground. Hysteresis is included for proper operating. Furthermore, a capacitor of 10 F (typical value) must be connected between pin LBI1 and ground when the input on pin LBI2 is used. The output of the low battery detector on pin LBO is an open-collector output. The output is high (i.e. no current is sunk by the collector) when the input voltage of the detector is below the lower detection level.
Philips Semiconductors
Objective specification
Battery power unit
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL Vn Tj Tamb Tstg Ves Note 1. ESD specification is in accordance with the JEDEC standard: PARAMETER voltage on any pin junction temperature ambient temperature storage temperature electrostatic handling voltage notes 1 and 2 CONDITIONS shut-down mode operating mode MIN. -0.2 -0.2 -40 -20 -40
TEA1202TS
MAX. +6.5 +5.5 +150 +80 +125 V V
UNIT
C C C V
Class II
a) Human Body Model (HBM) tests are carried out by discharging a 100 pF capacitor through a 1.5 k series resistor. b) Machine Model (MM) tests are carried out by discharging a 200 pF capacitor via a 0.75 H series inductor. 2. Exception is pin ILIM: 1000 V HBM and 100 V MM. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 140 UNIT K/W
QUALITY SPECIFICATION In accordance with "SNW-FQ-611 part E".
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
CHARACTERISTICS Tamb = -20 to +80 C; all voltages are measured with respect to ground; positive currents flow into the IC; unless otherwise specified. SYMBOL DC/DC converter UPCONVERSION; pin U/D = LOW VI(up) VO(up) VI(start) VO(uvlo) VI(dwn) VO(dwn) REGULATION VO(wdw) output voltage window size as a function of output voltage PWM mode 1.5 2.0 2.5 % input voltage output voltage start-up input voltage undervoltage lockout voltage IL < 10 mA note 1 VI(start) VO(uvlo) 0.93 2.0 - - 0.96 2.2 - - 5.50 5.50 1.00 2.4 V V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
DOWNCONVERSION; pin U/D = HIGH input voltage output voltage note 2 VO(uvlo) 1.30 5.50 5.50 V V
CURRENT LEVELS Iq(DCDC) Ishdwn Ilim(max) Ilim quiescent current current in shut-down mode maximum current limit current limit deviation Ilim set to 1.0 A; note 4 upconversion downconversion ILX(max) maximum continuous current at pins LX1 and LX2 Tamb = 80 C -12 -12 - - - - +12 +12 1.0 % % A note 3 - 0 - 110 2 5 - 10 - A A A
POWER MOSFETS RDSon(N) RDSon(P) EFFICIENCY efficiency upconversion VI = 1.2 V; VO up to 3.3 V; note 5 IL = 1 mA IL = 10 mA IL = 100 mA TIMING fsw fi(sync) tstart switching frequency synchronization clock input frequency start-up time note 6 PWM mode 480 6 - 600 13 10 720 20 - kHz MHz ms - - - 66 81 85 - - - % % % drain-to-source on-state resistance NFET drain-to-source on-state resistance PFET Tj = 27 C Tj = 27 C - - 110 125 - - m m
2000 Jun 08
10
Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
SYMBOL DIGITAL INPUT LEVELS VlL(n) VIH(n)
PARAMETER
CONDITIONS
MIN. -
TYP.
MAX.
UNIT
LOW-level input voltage on all digital pins HIGH-level input voltage on pins SYNC/PWM, SHDWN0 and SHDWN2 all other digital input pins note 7
0
0.4
V
0.55V4
-
V4 + 0.3 V V4 + 0.3 V 5.50 75 - V mV mV
V4 - 0.4 - VLDO < V4 + 0.4 V ILDO = 50 mA; note 9 ILDO = 50 mA 1.30 - 250 - - -
Low dropout voltage regulators; note 8 VLDO Vdropout Vdrop output voltage range dropout voltage minimum drop voltage for functionality within specification maximum output current output voltage accuracy line voltage regulation load voltage regulation power supply ripple rejection response time quiescent current shut-down current VFB1,2 > 2 V; Tj = 27 C VFB1,2 > 2 V
ILDO(max) VLDO Vline Vload PSRR tres Iq(LDO) Ishdwn(LDO) RDSon IO(max)
in regulation VI - VLDO = 2 V; ILDO = 10 A VI - VLDO > Vdrop 10 A < ILDO < 50 mA note 10 after load step from no load to ILDO(max)
- -2.0 - - 25 - - - - 0.40
50 - - - - 200 50 - 200 0.45
- +2.0 1 1 - - - 1 - 0.50
mA % mV mV dB s A A m A
SWITCH CIRCUIT drain-to-source resistance in switched-on state maximum output current in switched-on state
Low battery detector ILBD tt(HL) Vdet Vhys TCVdet TCVhys supply current of detector transition time VI = 0.9 V falling Vbat falling Vbat - - 0.88 36 - - 20 2 - - 0.92 44 - - A s V mV mV/K mV/K
DETECTION INPUT PIN LBI1 low battery detection level low battery detection hysteresis temperature coefficient of detection level temperature coefficient of detection hysteresis 0.90 40 0 0.175
DETECTION OUTPUT PIN LB0 IO(sink) output sink current 15 - - A
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
General characteristics Vref Iq Tamb Tmax Notes 1. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. When the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore the correct operation of this function is guaranteed over the whole temperature range. The undervoltage lockout level is measured at pin UPOUT/DNIN. 2. When VI is lower than the target output voltage but higher than 2.2 V, the P-type power MOSFET will remain conducting (duty factor is 100%), resulting in VO following VI. 3. The quiescent current is specified as the input current in the upconversion configuration at VI = 1.20 V and VO = 3.30 V, using L1 = 6.8 H, R1 = 150 k and R2 = 91 k. 4. The current limit is defined by resistor R10. This resistor must be 1% accurate. 5. The specified efficiency is valid when using an output capacitor having an ESR of 0.1 and an inductor of 6.8 H with an ESR of 0.05 and a sufficient saturation current level. 6. The specified start-up time is the time between the connection of a 1.20 V input voltage source and the moment the output reaches 3.30 V. The output capacitance equals 100 F, the inductance equals 6.8 H and no load is present. 7. V4 is the voltage at pin UPOUT/DNIN. If the applied HIGH-level voltage is less than V4 - 1 V, the quiescent current of the device will increase. 8. Specifications have been verified in the PFM mode. 9. The dropout voltage is defined as the voltage between the input and the output of the LDO when the output voltage has dropped 100 mV below its nominal value. The dropout voltage is measured while the LDO input voltage is decreasing and at maximum current. 10. Measured with a sine wave at fi = 100 Hz to 1 MHz, Vi = 100 mV (RMS) and ILDO = 10 mA. reference voltage quiescent current at pin UPOUT/DNIN ambient temperature internal temperature for cut-off all blocks operating 1.165 - -20 150 1.190 270 +25 160 1.215 - +80 170 V A C C
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
APPLICATION INFORMATION
TEA1202TS
handbook, full pagewidth
DC/DC UPCONVERTER LDO1
DC/DC output regulator 1 output regulator 2 output low battery detection
TEA1202TS
LDO2 LOW BATTERY DETECTOR equivalent block diagram
D1 L1 LX1 1 LX2 C1 IN2 20 11 16 LBI1 R7 low battery detection LBI2 LBO U/D 13 12 14 19 7 OUT1 R3 FB1 R4 C3 regulator 1 output 5 4 ILIM R10 DC/DC output
UPOUT/DNIN R1 FB0 R2 C2
6
TEA1202TS
external clock DC/DC shut-down regulator 2 shut-down SYNC/PWM SHDWN0 SHDWN2 Vref C5 18 2 3 15 8 GND 9 10
OUT2 R5 FB2 C4
regulator 2 output
17 R6 GND0
MGU063
Fig.5 Application in 1-cell NiCd or NiMH battery powered equipment.
2000 Jun 08
13
Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
handbook, full pagewidth
DC/DC UPCONVERTER LDO1
DC/DC output regulator 1 output regulator 2 output low battery detection
TEA1202TS
LDO2 LOW BATTERY DETECTOR equivalent block diagram
D1 L1 LX1 LX2 C1 IN2 LBI1 R8 C6 R2 LBI2 R7 R9 U/D 12 19 6 OUT1 R3 7 FB1 R4 external clock DC/DC shut-down regulator 2 shut-down SYNC/PWM SHDWN0 SHDWN2 Vref C5 18 2 3 15 8 GND 9 FB2 10 OUT2 R5 C4 regulator 2 output C3 regulator 1 output 1 20 11 13 16 FB0 5 4 ILIM R10 DC/DC output
UPOUT/DNIN R1 C2
TEA1202TS
low battery detection LBO 14
17 R6 GND0
MGU064
Fig.6 Application in 2-cell NiCd or NiMH battery powered equipment.
2000 Jun 08
14
Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
handbook, full pagewidth
control regulator 1 switch DC/DC output SWITCH LDO1 LDO2 LOW BATTERY DETECTOR output regulator 1 switch regulator 2 output low battery detection
DC/DC UPCONVERTER
TEA1202TS
equivalent block diagram
D1 L1 LX1 1 LX2 C1 IN2 LBI1 R8 C6 R2 LBI2 R7 R9 U/D 12 20 11 13 16 FB0 5 4 ILIM R10 DC/DC output
UPOUT/DNIN R1 C2
TEA1202TS
19 6 OUT1 output regulator 1 switch control regulator 1 switch
low battery detection external clock
LBO
14 7 FB1
SYNC/PWM SHDWN0 SHDWN2 Vref C5
18 2 3 15 8 GND 9 FB2 10 OUT2 R5 C4 regulator 2 output
17 R6 GND0
MGU065
Fig.7
Application in 2-cell NiCd or NiMH battery powered equipment with autonomous shut-down at low battery voltage and using LDO1 as a switch.
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
handbook, full pagewidth
DC/DC output DC/DC DOWNCONVERTER LDO1 regulator 1 output regulator 2 output low battery detection
TEA1202TS
LDO2 LOW BATTERY DETECTOR equivalent block diagram
5 UPOUT/DNIN 4 20 1
ILIM LX2 LX1
R10
IN2 11 C1 C6 R8 LBI2 R7 R9 LBI1 13
L1 D1 R1 C2 R2
DC/DC output
16
FB0
12 OUT1 R3 7 FB1 R4 18 2 3 15 8 GND 9 FB2 R6 OUT2 R5 C4 regulator 2 output C3 regulator 1 output
U/D
19
6
TEA1202TS
low battery detection external clock DC/DC shut-down regulator 2 shut-down LBO 14
SYNC/PWM SHDWN0 SHDWN2 Vref C5
10
17 GND0
MGU066
Fig.8 Application in 3-cell NiCd or NiMH and 1-cell Li-Ion battery powered equipment.
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
External component selection INDUCTOR L1 The performance of the TEA1202TS is not very sensitive to inductance value. The best efficiency performance over a wide load current range is achieved by using an inductance of 6.8 H e.g. TDK SLF7032 or Coilcraft DO1608 range. DC/DC INPUT CAPACITOR C1 The value of C1 strongly depends on the type of input source. In general, a 100 F tantalum capacitor is sufficient. DC/DC OUTPUT CAPACITOR C2 The value and type of C2 depends on the maximum output current and the ripple voltage which is allowed in the application. Low-ESR tantalum capacitors show good results. The most important specification of C2 is its ESR, which mainly determines output voltage ripple. DIODE D1 The Schottky diode is only used for short time during takeover from N-type power MOSFET and P-type power MOSFET and vice versa. Therefore, a medium-power diode is sufficient in most applications e.g. Philips PRLL5819. FEEDBACK RESISTORS R1 AND R2 The output voltage of the DC/DC converter is determined by the resistors R1 and R2. The following conditions apply: * Use a 1% accurate SMD type resistors only. If larger body resistors are used, the capacitance on pin FB0 will be too large, causing inaccurate operation. * Resistors R1 and R2 should have a maximum value of 50 k when connected in parallel. A higher value will result in inaccurate operation. Under these conditions, the output voltage can be calculated by the formula: R1 V O = V ref x 1 + ------- R2 CURRENT LIMITING RESISTOR R10
TEA1202TS
The maximum instantaneous current is set by the external resistor R10. The preferred type is SMD, 1% accurate. The connection of resistor R10 differs for each mode: * At upconversion: resistor R10 must be connected between pins ILIM and UPOUT/DNIN; the current 320 limiting level is defined by: I Iim = ---------R10 * At downconversion: resistor R10 must be connected between pins ILIM and GND0; the current limiting level 300 is defined by: I Iim = ---------R10 The average inductor current during limited current operation also depends on the inductance value, input voltage, output voltage and resistive losses in all components in the power path. Ensure that Ilim < Isat (saturation current) of the inductor. REFERENCE VOLTAGE DECOUPLING CAPACITOR C5 Optionally, a decoupling capacitor can be connected between pin Vref and ground in order to achieve a lower noise level of the output voltages of the LDO. The best choice for C5 is a ceramic multilayer capacitor of approximately 100 nF. LDO OUTPUT CAPACITORS C3 AND C4 A typical LDO output capacitor is a ceramic multilayer capacitor of 2.2 F, e.g. GRM40X5R225K6.3 of Murata. The ESR of the output capacitor must be between 10 and 100 m to achieve stability and the specified transient response.
2000 Jun 08
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Philips Semiconductors
Objective specification
Battery power unit
LDO FEEDBACK RESISTORS R3, R4, R5 AND R6 The output voltage of each LDO can be set by the external feedback resistors. Their values can be derived from the formulae: R3 V O = V ref x 1 + ------- R4 R5 V O = V ref x 1 + ------- R6 The maximum value for each of the LDO feedback resistors is 500 k.
TEA1202TS
LOW BATTERY DETECTOR COMPONENTS R7, R8, R9 AND C6 Resistor R7 is connected between pin LBO and the input or output pin and must be 330 k or higher. A 1-cell NiCd or NiMH battery can be connected directly to pin LBI1. A higher battery voltage must be applied to pin LBI2 using a divider circuit with resistor R8 and R9. In that situation, capacitor C6 (10 F) must be connected between pin LBI1 and ground. The low-battery detection level for a higher battery voltage can be set by the resistors at pin LBI2 using the formula: R8 V LBI2 = 0.90 x 1 + ------- R9
2000 Jun 08
18
Philips Semiconductors
Objective specification
Battery power unit
PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
TEA1202TS
SOT266-1
D
E
A X
c y HE vM A
Z
20
11
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
10
detail X wM
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.20 0.13 D (1) 6.6 6.4 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT266-1 REFERENCES IEC JEDEC MO-152 EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-22 99-12-27
2000 Jun 08
19
Philips Semiconductors
Objective specification
Battery power unit
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. Manual soldering
TEA1202TS
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2000 Jun 08
20
Philips Semiconductors
Objective specification
Battery power unit
Suitability of surface mount IC packages for wave and reflow soldering methods
TEA1202TS
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 Jun 08
21
Philips Semiconductors
Objective specification
Battery power unit
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
TEA1202TS
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2000 Jun 08
22
Philips Semiconductors
Objective specification
Battery power unit
NOTES
TEA1202TS
2000 Jun 08
23
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403502/25/01/pp24
Date of release: 2000
Jun 08
Document order number:
9397 750 06773


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